cmos_test_system

2017.11.13.11:14:08 Datasheet
Overview
  clk_50  cmos_test_system

All Components
   data_pattern_checker_0 altera_avalon_data_pattern_checker 16.930
   data_pattern_generator_0 altera_avalon_data_pattern_generator 16.930
   mm_bridge_0 altera_avalon_mm_bridge 16.930
Memory Map
  data_pattern_checker_0
csr_slave 
  data_pattern_generator_0
csr_slave 

clk_50

clock_source vnull


Parameters

generateLegacySim false
  

Software Assignments

(none)

data_pattern_checker_0

altera_avalon_data_pattern_checker v16.930
mm_bridge_0 m0   data_pattern_checker_0
  csr_slave
clk_50 clk  
  csr_clk
clk_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

(none)

data_pattern_generator_0

altera_avalon_data_pattern_generator v16.930
mm_bridge_0 m0   data_pattern_generator_0
  csr_slave
clk_50 clk  
  csr_clk
clk_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

(none)

mm_bridge_0

altera_avalon_mm_bridge v16.930
clk_50 clk   mm_bridge_0
  clk
clk_reset  
  reset
m0   data_pattern_generator_0
  csr_slave
m0   data_pattern_checker_0
  csr_slave


Parameters

generateLegacySim false
  

Software Assignments

(none)
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