q_sys |
|
2019.12.04.10:35:38 | Datasheet |
clk_100 | q_sys |
clk_50 | |
qsfpdd_xcvr_test_0_clk_100 | |
qsfpdd_xcvr_test_0_clk_50 | |
qsfpdd_xcvr_test_0_xcvr_test_system_0_clk_50 | |
qsfpdd_xcvr_test_1_clk_100 | |
qsfpdd_xcvr_test_1_clk_50 | |
qsfpdd_xcvr_test_1_xcvr_test_system_0_clk_50 | |
qsfpdd_xcvr_test_2_clk_100 | |
qsfpdd_xcvr_test_2_clk_50 | |
qsfpdd_xcvr_test_2_xcvr_test_system_0_clk_50 | |
qsfpdd_xcvr_test_3_clk_100 | |
qsfpdd_xcvr_test_3_clk_50 | |
qsfpdd_xcvr_test_3_xcvr_test_system_0_clk_50 | |
qsfpdd_xcvr_test_4_clk_100 | |
qsfpdd_xcvr_test_4_clk_50 | |
qsfpdd_xcvr_test_4_xcvr_test_system_0_clk_50 | |
qsfpdd_xcvr_test_5_clk_100 | |
qsfpdd_xcvr_test_5_clk_50 | |
qsfpdd_xcvr_test_5_xcvr_test_system_0_clk_50 | |
qsfpdd_xcvr_test_6_clk_100 | |
qsfpdd_xcvr_test_6_clk_50 | |
qsfpdd_xcvr_test_6_xcvr_test_system_0_clk_50 | |
qsfpdd_xcvr_test_7_clk_100 | |
qsfpdd_xcvr_test_7_clk_50 | |
qsfpdd_xcvr_test_7_xcvr_test_system_0_clk_50 | |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
clk_50 | clk | master_0 | |
clk | |||
clk_reset | |||
clk_reset | |||
master | product_info_0 | ||
avalon_slave_0 | |||
master | temp_info_0 | ||
avalon_slave_0 | |||
master | i2c_2 | ||
csr | |||
master | i2c_1 | ||
csr | |||
master | i2c_0 | ||
csr | |||
master | qsfpdd_xcvr_test_1_mm_bridge_0 | ||
s0 | |||
master | qsfpdd_xcvr_test_0_mm_bridge_0 | ||
s0 | |||
master | qsfpdd_xcvr_test_2_mm_bridge_0 | ||
s0 | |||
master | qsfpdd_xcvr_test_3_mm_bridge_0 | ||
s0 | |||
master | qsfpdd_xcvr_test_4_mm_bridge_0 | ||
s0 | |||
master | qsfpdd_xcvr_test_5_mm_bridge_0 | ||
s0 | |||
master | qsfpdd_xcvr_test_6_mm_bridge_0 | ||
s0 | |||
master | qsfpdd_xcvr_test_7_mm_bridge_0 | ||
s0 | |||
master | module_debug_outputs | ||
s1 | |||
master | module_debug_inputs | ||
s1 |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_native_s10_etile_0 | tx_clkout2 | q_sys_iopll_9a | |
refclk | |||
clk_50 | clk_reset | ||
reset | |||
outclk0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
outclk0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
outclk0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
outclk0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
outclk0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
outclk0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
outclk0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
outclk0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_0_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_0_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_0_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_clk_50 | clk | qsfpdd_xcvr_test_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_0_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_0_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_0_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_0_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_0_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_0_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_0_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_0_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_0_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready | |||
tx_clkout2 | q_sys_iopll_9a | ||
refclk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_0_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_0_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_clk_50 | clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_0_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_0_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_0_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_0_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_0_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_0_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_0_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_0_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_0_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_0_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_0_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_0_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_0_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_0_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_0_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_1_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_1_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_1_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_1_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_1_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_clk_50 | clk | qsfpdd_xcvr_test_1_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_1_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_1_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_mm_bridge_0 | m0 | qsfpdd_xcvr_test_1_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_1_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_1_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_mm_bridge_0 | m0 | qsfpdd_xcvr_test_1_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_1_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_1_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_1_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_1_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_1_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_1_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_clk_50 | clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_1_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_1_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_1_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_1_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_1_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_1_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_1_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_1_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_1_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_1_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_1_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_1_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_1_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_1_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_1_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_2_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_2_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_2_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_2_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_2_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_clk_50 | clk | qsfpdd_xcvr_test_2_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_2_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_2_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_mm_bridge_0 | m0 | qsfpdd_xcvr_test_2_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_2_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_2_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_mm_bridge_0 | m0 | qsfpdd_xcvr_test_2_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_2_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_2_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_2_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_2_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_2_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_2_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_clk_50 | clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_2_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_2_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_2_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_2_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_2_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_2_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_2_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_2_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_2_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_2_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_2_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_2_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_2_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_2_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_2_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_3_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_3_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_3_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_3_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_3_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_clk_50 | clk | qsfpdd_xcvr_test_3_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_3_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_3_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_mm_bridge_0 | m0 | qsfpdd_xcvr_test_3_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_3_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_3_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_mm_bridge_0 | m0 | qsfpdd_xcvr_test_3_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_3_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_3_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_3_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_3_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_3_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_3_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_clk_50 | clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_3_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_3_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_3_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_3_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_3_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_3_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_3_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_3_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_3_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_3_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_3_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_3_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_3_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_3_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_3_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_4_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_4_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_4_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_4_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_4_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_clk_50 | clk | qsfpdd_xcvr_test_4_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_4_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_4_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_mm_bridge_0 | m0 | qsfpdd_xcvr_test_4_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_4_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_4_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_mm_bridge_0 | m0 | qsfpdd_xcvr_test_4_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_4_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_4_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_4_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_4_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_4_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_4_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_clk_50 | clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_4_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_4_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_4_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_4_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_4_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_4_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_4_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_4_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_4_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_4_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_4_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_4_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_4_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_4_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_4_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_5_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_5_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_5_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_5_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_5_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_clk_50 | clk | qsfpdd_xcvr_test_5_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_5_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_5_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_mm_bridge_0 | m0 | qsfpdd_xcvr_test_5_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_5_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_5_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_mm_bridge_0 | m0 | qsfpdd_xcvr_test_5_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_5_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_5_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_5_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_5_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_5_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_5_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_clk_50 | clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_5_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_5_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_5_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_5_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_5_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_5_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_5_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_5_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_5_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_5_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_5_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_5_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_5_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_5_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_5_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_6_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_6_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_6_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_6_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_6_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_clk_50 | clk | qsfpdd_xcvr_test_6_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_6_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_6_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_mm_bridge_0 | m0 | qsfpdd_xcvr_test_6_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_6_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_6_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_mm_bridge_0 | m0 | qsfpdd_xcvr_test_6_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_6_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_6_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_6_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_6_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_6_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_6_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_clk_50 | clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_6_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_6_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_6_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_6_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_6_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_6_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_6_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_6_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_6_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_6_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_6_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_6_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_6_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_6_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_6_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
clk_100 | clk | qsfpdd_xcvr_test_7_clk_100 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_7_xcvr_native_s10_etile_0 | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset |
Parameters
|
Software Assignments(none) |
clk_50 | clk | qsfpdd_xcvr_test_7_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_7_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_clk_50 | ||
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_7_xcvr_conduit_ctrl_0 | ||
clock | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_clk_50 | clk | qsfpdd_xcvr_test_7_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
master_0 | master | ||
s0 | |||
m0 | qsfpdd_xcvr_test_7_xcvr_conduit_ctrl_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_mm_bridge_0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_7_xcvr_native_s10_etile_0 | ||
reconfig_avmm |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_mm_bridge_0 | m0 | qsfpdd_xcvr_test_7_xcvr_conduit_ctrl_0 |
csr | ||
qsfpdd_xcvr_test_7_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_7_xcvr_native_s10_etile_0 | rx_pma_ready | |
rx_pma_ready | ||
rx_ready | ||
rx_ready | ||
tx_pma_ready | ||
tx_pma_ready | ||
tx_ready | ||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_mm_bridge_0 | m0 | qsfpdd_xcvr_test_7_xcvr_native_s10_etile_0 | |
reconfig_avmm | |||
qsfpdd_xcvr_test_7_clk_100 | clk | ||
reconfig_clk | |||
clk_reset | |||
reconfig_reset | |||
qsfpdd_xcvr_test_7_xcvr_st_converter_0 | rx_clkout_a_output | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
refclk_etile_9a | out_clk | ||
pll_refclk0 | |||
rx_clkout | qsfpdd_xcvr_test_7_xcvr_st_converter_0 | ||
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
rx_pma_ready | qsfpdd_xcvr_test_7_xcvr_conduit_ctrl_0 | ||
rx_pma_ready | |||
rx_ready | |||
rx_ready | |||
tx_pma_ready | |||
tx_pma_ready | |||
tx_ready | |||
tx_ready |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_native_s10_etile_0 | rx_clkout | qsfpdd_xcvr_test_7_xcvr_st_converter_0 | |
rx_clkout | |||
tx_clkout | |||
tx_clkout | |||
rx_is_lockedtodata | |||
rx_is_lockedtodata | |||
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in | ||
rx_data_a | |||
rx_clkout_a_output | qsfpdd_xcvr_test_7_xcvr_native_s10_etile_0 | ||
rx_coreclkin | |||
tx_clkout_a_output | |||
tx_coreclkin | |||
rx_parallel_data | |||
rx_parallel_data | |||
tx_parallel_data | |||
tx_parallel_data | |||
rx_clkout_a | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_clk | |||
tx_clkout_a | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_clk_50 | clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_clk_50 | |
clk_in | |||
clk_reset | |||
clk_in_reset | |||
clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_mm_bridge_0 | ||
clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_freq_counter_0 | ||
clock | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_clk | |||
clk_reset | |||
reset | |||
clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_clk | |||
clk_reset | |||
reset |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_checker_0 |
csr_slave | ||
qsfpdd_xcvr_test_7_xcvr_test_system_0_clk_50 | clk | |
csr_clk | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | data_pattern_checker_pattern_in_fifo_read | |
conduit_pattern_in | ||
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_a | |
conduit_pattern_in_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_generator_0 | |
csr_slave | |||
qsfpdd_xcvr_test_7_xcvr_test_system_0_clk_50 | clk | ||
csr_clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | data_pattern_generator_pattern_out_fifo_write | ||
conduit_pattern_out | |||
conduit_pattern_out_clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | ||
tx_clkout2_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_mm_bridge_0 | m0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_freq_counter_0 |
csr | ||
qsfpdd_xcvr_test_7_xcvr_test_system_0_clk_50 | clk | |
clock | ||
clk_reset | ||
reset | ||
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_sample | |
sample_clock |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_clk_50 | clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_mm_bridge_0 | |
clk | |||
clk_reset | |||
reset | |||
qsfpdd_xcvr_test_7_mm_bridge_0 | m0 | ||
s0 | |||
m0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_freq_counter_0 | ||
csr | |||
m0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_generator_0 | ||
csr_slave | |||
m0 | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_checker_0 | ||
csr_slave |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_7_xcvr_test_system_0_rx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | fifo_output | qsfpdd_xcvr_test_7_xcvr_test_system_0_tx_fifo | |
fifo_output | |||
fifo_input | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
fifo_input |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_generator_0 | conduit_pattern_out_clk | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | |
tx_clkout2_a | |||
q_sys_iopll_9a | outclk0 | ||
rx_clkout2 | |||
outclk0 | |||
tx_clkout2 | |||
tx_clkout2_sample | qsfpdd_xcvr_test_7_xcvr_test_system_0_freq_counter_0 | ||
sample_clock | |||
rx_clkout2_a | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in_clk | |||
rx_clkout2_b | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
tx_clkout2_b | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | ||
data_pattern_generator_pattern_out_fifo_write_clk |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_rx_fifo | fifo_input | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_rx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | rx_clkout2_b | ||
data_pattern_checker_pattern_in_fifo_read_clk | |||
qsfpdd_xcvr_test_7_xcvr_st_converter_0 | rx_clkout_a | ||
data_pattern_checker_pattern_in_clk | |||
data_pattern_checker_pattern_in_fifo_read | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_checker_0 | ||
conduit_pattern_in | |||
fifo_output | qsfpdd_xcvr_test_7_xcvr_test_system_0_rx_fifo | ||
fifo_output | |||
data_pattern_checker_pattern_in | qsfpdd_xcvr_test_7_xcvr_st_converter_0 | ||
rx_data_a |
Parameters
|
Software Assignments(none) |
qsfpdd_xcvr_test_7_xcvr_test_system_0_tx_fifo | fifo_input | qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_user_tx_fifo_converter_0 | |
fifo_input | |||
qsfpdd_xcvr_test_7_xcvr_test_system_0_xcvr_tx_rx_clkout2_converter_0 | tx_clkout2_b | ||
data_pattern_generator_pattern_out_fifo_write_clk | |||
qsfpdd_xcvr_test_7_xcvr_st_converter_0 | tx_clkout_a | ||
data_pattern_generator_pattern_out_clk | |||
tx_data_a | |||
data_pattern_generator_pattern_out | |||
data_pattern_generator_pattern_out_fifo_write | qsfpdd_xcvr_test_7_xcvr_test_system_0_data_pattern_generator_0 | ||
conduit_pattern_out | |||
fifo_output | qsfpdd_xcvr_test_7_xcvr_test_system_0_tx_fifo | ||
fifo_output |
Parameters
|
Software Assignments(none) |
generation took 0.01 seconds | rendering took 0.32 seconds |