Release Notes For ModelSim Intel FPGA 2020.3 Jul 22 2020 Copyright 1991-2020 Mentor Graphics Corporation All rights reserved. This document contains information that is proprietary to Mentor Graphics Corporation. The original recipient of this document may duplicate this document in whole or in part for internal business purposes only, provided that this entire notice appears in all copies. In duplicating any part of this document the recipient agrees to make every reasonable effort to prevent the unauthorized use and distribution of the proprietary information. TRADEMARKS: The trademarks, logos and service marks ("Marks") used herein are the property of Mentor Graphics Corporation or other third parties. No one is permitted to use these Marks without the prior written consent of Mentor Graphics or the respective third-party owner. The use herein of a third-party Mark is not an attempt to indicate Mentor Graphics as a source of a product, but is intended to indicate a product from, or associated with, a particular third party. The following are trademarks of of Mentor Graphics Corporation: Questa, ModelSim, JobSpy, and Signal Spy. A current list of Mentor Graphics trademarks may be viewed at www.mentor.com/terms_conditions/trademarks.cfm. End-User License Agreement: You can print a copy of the End-User License Agreement from: www.mentor.com/terms_conditions/enduser.cfm. _______________________________________________________________________ * How to Get Support ModelSim Intel FPGA is supported by Intel + World-Wide-Web Support [1]http://www.altera.com/mySupport _______________________________________________________________________ Index to Release Notes * [2]Key Information * [3]Release Announcements in 2020.3 * [4]Base Product Specifications in 2020.3 * [5]Compatibility Issues with Release 2020.3 * [6]SystemVerilog Defects Repaired in 2020.3 * [7]Mixed Language Defects Repaired in 2020.3 * [8]Document Revision History in 2020.3 _______________________________________________________________________ Key Information * QSIM-555 - Systemc/GCC Changes starting 2020.1: o SystemC/DPI/PLI/VPI/FLI default compiler (GCC) for linux and linux_x86_64 platforms is upgraded to 7.4.0 o GCC 4.5.0 is no longer supported and it will no longer be distributed with the release. This affects linux and linux_x86_64 platforms only. o Supported compilers on linux and linux_x86_64 platforms: gcc-7.4.0, gcc-5.3.0 and gcc-4.7.4 o Support for the IEEE 1666-2005 SystemC-2.2 standard has been deprecated and it is no longer supported. * Starting 2021.1 release, Redhat Enterprise Linux (RHEL) 6 platform will not be supported. _______________________________________________________________________ Release Announcements in 2020.3 * Due to enhanced security restrictions with web browser PDF plug-ins, some links do not function. Links in HTML documentation are fully functional. Clicking a link within a PDF viewed in a web browser may result in no action, or it may load the title page of the current PDF manual (instead of the intended target in the PDF manual). The unresolved link behavior occurs in all web browsers on Windows and Linux platforms. Because of this behavior, the navigational experience of PDF manuals is compromised. PDF is ideal for printing because of its page-oriented layout. Use the HTML manuals to search for topics, navigate between topics, and click links to examples, videos, reference material, and other related technical content. For information about Adobe's discontinued support of Adobe Reader on Linux platforms and your available options, refer to Knowledge Article MG596568 on SupportNet. Linux is a registered trademark of Linus Torvalds in the U.S. and other countries. * Since 2019.1 release, support for Windows 7 and 8.1 have discontinued. Only Windows 10 is supported. However, we continue to support Windows 7 & 8.1 with our 10.7 release series until their planned End Of Life (10.7 EOL - mid 2020) * Starting 2020.2 release, support for Universal VHDL Verification Methodology has been added to Questa Simulation. The UVVM library is included in this download _______________________________________________________________________ Base Product Specifications in 2020.3 * [Supported Platforms] Linux RHEL 6 x86/x86-64 Linux RHEL 7 x86/x86-64 Linux RHEL 8 x86/x86-64 Linux SLES 11 x86/x86-64 Linux SLES 12 x86/x86-64 Windows 10 x86/x64 [Supported GCC Compilers (for SystemC)] gcc-7.4.0-linux/gcc-7.4.0-linux_x86_64 gcc-5.3.0-linux/gcc-5.3.0-linux_x86_64 gcc-4.7.4-linux/gcc-4.7.4-linux_x86_64 gcc-4.2.1-mingw32vc12 [OVL (shipped with product)] v2.8.1 [VHDL OSVVM (shipped with product)] v2014.07 [VHDL UVVM (shipped with product)] UVVM v2019.11.25 [Licensing] FLEXnet v11.16.4.0 MSL v2019_3 MGLS v9.22_3.1.0 PCLS v9.22.3.1.0 _______________________________________________________________________ Compatibility Issues with Release 2020.3 SystemVerilog Compatibility * QSIM-62783 - (source) Vlog and vopt handled cases where a class had the same name as a package incorrectly in some cases. Given this example: package P ; typedef logic type1_t; class P; typedef logic type2_t; endclass endpackage import P::*; // Import in $unit scope makes class named "P" potentially visible module top; P::type1_t i; // This should be an error because "P" should reference the class P::type2_t j; // This should resolve to the type in class "P" endmodule The correct behavior is to report an error for P::type1_t and accept P::type2_t, but previous releases reversed that behavior. * QSIM-62590 - (source) In some cases, a randomize() call with in-line constraints, if the constraint symbol is not declared, it would insert dummy symbol instead, this now flags an error. _______________________________________________________________________ SystemVerilog Defects Repaired in 2020.3 * QSIM-62783 - (source) Vlog and vopt handled cases where a class had the same name as a package incorrectly in some cases. Given this example: package P ; typedef logic type1_t; class P; typedef logic type2_t; endclass endpackage import P::*; // Import in $unit scope makes class named "P" potentially visible module top; P::type1_t i; // This should be an error because "P" should reference the class P::type2_t j; // This should resolve to the type in class "P" endmodule The correct behavior is to report an error for P::type1_t and accept P::type2_t, but previous releases reversed that behavior. * QSIM-62590 - (source) In some cases, a randomize() call with in-line constraints, if the constraint symbol is not declared, it would insert dummy symbol instead, this now flags an error. _______________________________________________________________________ Mixed Language Defects Repaired in 2020.3 * QSIM-64244 - When Verilog instantiates a VHDL design unit, processing for connectivity analysis under the -rnm vopt switch did not correctly handle ports associated by-name. _______________________________________________________________________ Document Revision History in 2020.3 * Revision - Changes - Status/Date + 5.2 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/July 2020 + 5.1 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/April 2020 + 5.0 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/January 2020 * Author: In-house procedures and working practices require multiple authors for documents. All associated authors for each topic within this document are tracked within the document source. * Revision History: Released documents maintain a revision history of up to four revisions. For earlier revision history, refer to earlier releases of documentation which are available on Support Center (http://support.mentor.com).