PSG OBL for Acceleration Cards [v.2021.08.04]

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APPENDIX A

INTEL END USER SOFTWARE LICENSE AGREEMENT

IMPORTANT - READ BEFORE COPYING, INSTALLING OR USING.

THE FOLLOWING NOTICE, OR TERMS AND CONDITIONS SUBSTANTIALLY IDENTICAL IN NATURE AND EFFECT, MUST APPEAR IN THE DOCUMENTATION ASSOCIATED WITH THE INTEL-BASED PRODUCT INTO WHICH THE SOFTWARE IS INSTALLED. MINIMALLY, SUCH NOTICE MUST APPEAR IN THE USER GUIDE FOR THE PRODUCT. THE TERM “YOU” IN THIS TEXT REFERS TO THE END USER OF THE PRODUCT.

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(d) The Software may contain the software and other intellectual property of third party suppliers, some of which may be identified in, and licensed in accordance with, an enclosed license.txt file or other text or file.

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U.S. GOVERNMENT RESTRICTED RIGHTS. The Software is a commercial item (as defined in 48 C.F.R. 2.101) consisting of commercial computer software and commercial computer software documentation (as those terms are used in 48 C.F.R. 12.212), consistent with 48 C.F.R. 12.212 and 48 C.F.R 227.7202-1 through 227.7202-4. You will not provide the Software to the U.S. Government. Contractor or Manufacturer is Intel Corporation, 2200 Mission College Blvd., Santa Clara, CA 95054.

EXPORT LAWS. You agree that neither You nor Your subsidiaries will export/re-export the Software, directly or indirectly, to any country for which the U.S. Department of Commerce or any other agency or department of the U.S. Government or the foreign government from where it is shipping requires an export license, or other governmental approval, without first obtaining any such required license or approval. In the event the Software is exported from the U.S.A. or re-exported from a foreign destination by You, You will ensure that the distribution and export/re-export or import of the Software complies with all laws, regulations, orders, or other restrictions of the U.S. Export Administration Regulations and the appropriate foreign government.

APPLICABLE LAWS. This Agreement and any dispute arising out of or relating to it will be governed by the laws of the U.S.A. and Delaware, without regard to conflict of laws principles. The Parties to this Agreement exclude the application of the United Nations Convention on Contracts for the International Sale of Goods (1980). The state and federal courts sitting in Delaware, U.S.A. will have exclusive jurisdiction over any dispute arising out of or relating to this Agreement. The Parties consent to personal jurisdiction and venue in those courts. A Party that obtains a judgment against the other Party in the courts identified in this section may enforce that judgment in any court that has jurisdiction over the Parties.

Your specific rights may vary from country to country.


APPENDIX B

  A. FOR Intel® FPGA PAC N3000

Software: Acceleration Stack (IAS) for Intel Xeon CPU with FPGAs

Description: IAS Software consists of the following:

1. Arria® 10 FPGA Factory Image

2. Arria® 10 Nios Firmware

3. Example Arria® 10 Reference RTL with encrypted FPGA Interface Manager (FIM)

4. MAX® 10 RTL Image

5. MAX® 10 Nios Firmware

6. Software installer to auto-install multiple Remote-system-upgradeable components

7. XL710 Ethernet NIC Firmware

8. Example Arria® 10 reference RTL with encrypted FIM

9. Accompanying Documentation


  B. For Intel® PAC With Arria® 10 GX FPGA

Software: Acceleration Stack for Intel Xeon CPU with FPGAs

Description: the Software consists of the following:

1. FPGA Bitstreams (FPGA Interface Manager)

2. Example accelerator designs (aka Accelerated Function Units that include RTL, software, FPGA binaries and Quartus files such as QDBs)

3. Example accelerator components (aka Intel FPGA Basic Building Blocks that include the RTL, software, FPGA binaries and Quartus files such as QDBs)

4. OpenCL Board Support Package (BSP)

5. FPGA Library (aka FPGA API or Open Programmable Accelerator Engine)

6. Linux driver (aka FPGA Driver)

7. Example applications written against FPGA API (aka OPAE)

8. Accompanying documentation

9. Intel Quartus Prime Pro Edition Programmer

10. Intel FPGA Runtime Environment (RTE) for OpenCL

11. Intel Arria 10 PCI Express IP with SR-IOV


  C. For Intel® FPGA PAC D5005

Software: Intel Acceleration Stack (IAS) for Intel Xeon CPU with FPGAs

Description: IAS Software consists of the following:

1. FPGA Bitstreams (FPGA Interface Manager)

2. Example accelerator designs (aka Accelerated Function Units that include RTL, software, FPGA binaries and Quartus files such as QDBs)

3. Example accelerator components (aka Intel FPGA Basic Building Blocks that include the RTL, software, FPGA binaries and Quartus files such as QDBs)

4. OpenCL Board Support Package (BSP)

5. Linux driver (aka FPGA Driver)

6. Open Programmable Acceleration Engine (OPAE) Drivers, Library and Tools

7. Board Management Controller (BMC) with Root of Trust (RoT)

8. Accompanying documentation

9. Intel Quartus Prime Pro Edition Programmer

10. Intel FPGA Runtime Environment (RTE) for OpenCL

11. Intel Stratix 10 PCI Express IP with SR-IOV


The Software described in each section above will be distributed over one or more releases. Files may be removed or added at Intel’s discretion.

Accept Reject