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Metric collected during Intel Advisor Memory Access Patterns analysis and found in Memory Access Patterns Report.
Required analysis property/CLI option for collection: TBW.
Content type: TBW.
Description: TBW.
Comparison with similar metrics: TBW
Interpretation: TBW.
Calculation/Aggregation: TBW.
Possible values:
Uniform stride 0 - Instruction accesses the same memory from iteration to iteration.
Represents the ideal situation and does not require any improvements.
Unit stride (stride 1) - Instruction accesses memory that consistently changes by one element from iteration to iteration.
Represents the ideal situation and does not require any improvements.
Constant stride (stride N) - Instruction accesses memory that consistently changes by N elements (N>1) from iteration to iteration.
Code uses more memory than is ideal and requires more cache lines. Consider studying recommendations on AOS/SOA optimization.
Irregular stride - Instruction accesses memory addresses that change by an unpredictable number of elements from iteration to iteration.
Might limit vectorization or even make vectorization impossible.
Gather (irregular) stride - Detected for v(p)gather* instructions on AVX2 Instruction Set Architecture (ISA).
The compiler vectorized code with an irregular memory access pattern. Consider improving the code to use a more constant memory access pattern.
Empty if: TBW.