Intel® Math Kernel Library 2018 Developer Reference - C

Named Constants for CNR Control

Intel MKL provides reproducible results for a certain code branch, determined by the instruction set architecture (ISA). To define CNR code branches, use the following named constants as input/output for conditional numerical reproducibility support functions. Pass named constants to the functions instead of their values.

Named Constant

Value

Description

MKL_CBWR_AUTO

2

CNR mode uses the standard ISA-based dispatching model while ensuring fixed cache sizes, deterministic reductions, and static scheduling

   

CNR mode uses the branch for the following ISA:

MKL_CBWR_COMPATIBLE

3

Intel® Streaming SIMD Extensions 2 (Intel® SSE2) without rcpps/rsqrtps instructions

MKL_CBWR_SSE2

4

Intel SSE2

MKL_CBWR_SSE3

5

DEPRECATED. Intel® Streaming SIMD Extensions 3 (Intel® SSE3). This setting is kept for backward compatibility and is equivalent to MKL_CBWR_SSE2.

MKL_CBWR_SSSE3

6

Supplemental Streaming SIMD Extensions 3 (SSSE3)

MKL_CBWR_SSE4_1

7

Intel® Streaming SIMD Extensions 4-1 (SSE4-1)

MKL_CBWR_SSE4_2

8

Intel® Streaming SIMD Extensions 4-2 (SSE4-2)

MKL_CBWR_AVX

9

Intel® Advanced Vector Extensions (Intel® AVX)

MKL_CBWR_AVX2

10

Intel® Advanced Vector Extensions 2 (Intel® AVX2)

MKL_CBWR_AVX512_MIC

11

Intel® Advanced Vector Extensions 512 (Intel® AVX-512) on Intel® Xeon Phi™ processors

MKL_CBWR_AVX512

12

Intel AVX-512 on Intel® Xeon® processors

When specifying the CNR branch with the named constants, be aware of the following:

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

See Also