Intel® Math Kernel Library 2018 Update 1 Developer Guide

Specifying Code Branches

Intel MKL provides conditional numerically reproducible results for a code branch determined by the supported instruction set architecture (ISA). The values you can specify for the MKL_CBWR environment variable may have one of the following equivalent formats:

The <branch> placeholder specifies the CNR branch with one of the following values:

Value

Description

AUTO

CNR mode uses the standard ISA-based dispatching model while ensuring fixed cache sizes, deterministic reductions, and static scheduling

CNR mode uses the branch for the following ISA:

COMPATIBLE

Intel® Streaming SIMD Extensions 2 (Intel® SSE2) without rcpps/rsqrtps instructions

SSE2

Intel SSE2

SSE3

DEPRECATED. Intel® Streaming SIMD Extensions 3 (Intel® SSE3). This setting is kept for backward compatibility and is equivalent to SSE2.

SSSE3

Supplemental Streaming SIMD Extensions 3 (SSSE3)

SSE4_1

Intel® Streaming SIMD Extensions 4-1 (Intel® SSE4-1)

SSE4_2

Intel® Streaming SIMD Extensions 4-2 (Intel® SSE4-2)

AVX

Intel® Advanced Vector Extensions (Intel® AVX)

AVX2

Intel® Advanced Vector Extensions 2 (Intel® AVX2)

AVX512_MIC

Intel® Advanced Vector Extensions 512 (Intel® AVX-512) on Intel® Xeon Phi™ processors and coprocessors

AVX512

Intel AVX-512 on Intel® Xeon® processors

When specifying the CNR branch, be aware of the following:

Setting the MKL_CBWR environment variable or a call to an equivalent mkl_cbwr_set function fixes the code branch and sets the reproducibility mode.

CBWR supports AVX512_MIC, AVX512, and AVX512_MIC_E1 as well.

Note

See the Intel MKL Developer Reference for how to specify the branches using functions.

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

See Also