Intel® Advisor Help
Set the cache line size (in bytes) to collect modeling data for CPU cache behavior during Memory Access Patterns analysis.
Project Properties > Analysis Target > Memory Access Patterns > Advanced > Cache line size
--cachesim-cacheline-size=<integer> |
<integer> is in bytes: 4 | 8 | 16 | 32 | 64 | 128 | 256 | 512 | 1024 | 2048 | 4096 | 8192 | 16384 | 32768 | 65536
64
collect=map --enable cache-simulation
Cache simulation modeling applies to the following analyses:
Memory Access Patterns - This basic simulation functionality models accurate memory footprints, miss information, and cache line utilization for a downstream Memory Access Patterns report.
Trip Counts and FLOP - This enhanced simulation functionality models multiple levels of cache for a downstream GUI Roofline chart or Roofline interactive HTML report. To enable enhanced simulation functionality in a GUI Roofline chart: Set the ADVIXE-EXPERIMENTAL=int_roofline environment variable.
Run a Memory Access Patterns analysis. Model four-way associative cache with 64-byte cache line size and default cache set size.
$ advixe-cl collect=map --enable-cache-simulation --cachesim-cacheline-size=64 --cachesim-associativity=4 --cachesim-mode=utilization --project-dir=./myAdvisorProj -- ./myApp