Release Notes For Questa Sim - Intel FPGA Edition 2022.4 Oct 18 2022 Copyright 1991-2022 Mentor Graphics Corporation All rights reserved. This document contains information that is proprietary to Mentor Graphics Corporation. The original recipient of this document may duplicate this document in whole or in part for internal business purposes only, provided that this entire notice appears in all copies. In duplicating any part of this document the recipient agrees to make every reasonable effort to prevent the unauthorized use and distribution of the proprietary information. TRADEMARKS: The trademarks, logos and service marks ("Marks") used herein are the property of Mentor Graphics Corporation or other third parties. No one is permitted to use these Marks without the prior written consent of Mentor Graphics or the respective third-party owner. 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End-User License Agreement: You can print a copy of the End-User License Agreement from: www.mentor.com/terms_conditions/enduser.cfm. _______________________________________________________________________ * How to Get Support For information on how to obtain technical support, visit the support page at [1]http://supportnet.mentor.com _______________________________________________________________________ Index to Release Notes * [2]Key Information * [3]Release Announcements in 2022.4 * [4]Base Product Specifications in 2022.4 * [5]Compatibility Issues with Release 2022.4 * [6]SystemVerilog Defects Repaired in 2022.4 * [7]VHDL Defects Repaired in 2022.4 * [8]SystemC Defects Repaired in 2022.4 * [9]Mixed Language Defects Repaired in 2022.4 * [10]SystemVerilog Enhancements in 2022.4 * [11]VHDL Enhancements in 2022.4 * [12]Document Revision History in 2022.4 _______________________________________________________________________ Key Information * QSIM-74070 - (source) Starting 2022.1 release, OSVVM and UVVM libraries are no longer shipped in Questa installation. Users needing these libraries can directly download them to compile and use with QuestaSim * QSIM-72784 - This release supports the new licensing solution, Siemens Advanced Licensing Technology (SALT), and includes new licensing documentation: Siemens Digital Industries Software License Server Installation Instructions and Siemens Digital Industries Software Licensing Manual for Mentor Products. Please refer to your product licensing installation document first. There is no change between 2021.x and 2022.1 with regards to the FLEXnet version used, it continues to be FLEXnet v11.16.4.0. For floating licenses, it will be necessary to verify that the vendor daemon (i.e., mgcld) and the license server (i.e., lmgrd) have FLEXnet versions equal to or greater than 11.16.4.0. If the current FLEXnet version of your vendor daemon and lmgrd are less than 11.16.4.0 then it will be necessary to stop your license server and restart it using the vendor daemon and lmgrd contained in this release. If you use node locked licenses you don't need to do anything. This release will update licensing to SALT v1.4.3.0. In summary, this release uses the following license versions: + FLEXnet v11.16.4.0 + SALT v1.4.3.0 * (source, results) Starting from 2023.1 release: 1. For linux and linux_x86_64: 1. GCC 5.3.0 and GCC 4.7.4 will no longer be supported and they will no longer be distributed with the release. * For linux_aarch64: 1. GCC 5.4.0 will no longer be supported and it will no longer be distributed with the release. The vhdl2008 technote located at docs/technotes/vhdl2008.note has been removed. QSIM-78417 - There is no change between 2022.3 and 2022.4 with regards to the FLEXnet version used, it continues to be FLEXnet v11.16.4.0. For floating licenses, it will be necessary to verify that the vendor daemon (i.e., mgcld) and the license server (i.e., lmgrd) have FLEXnet versions equal to or greater than 11.16.4.0. If the current FLEXnet version of your vendor daemon and lmgrd are less than 11.16.4.0 then it will be necessary to stop your license server and restart it using the vendor daemon and lmgrd contained in this release. If you use node locked licenses you don't need to do anything. This release will update licensing to SALT v1.6.1.0. In summary, this release uses the following license versions: * FLEXnet v11.16.4.0 * SALT v1.6.1.0 (source) For protected HDL source (Verilog and VHDL), legacy ciphers (data_method) "3des-cbc", "des-cbc", "blowfish-cbc", and "cast128-cbc" are no longer supported for either encryption (in vhencrypt/vencrypt) or for decryption (in vcom/vlog). Further, encoding method (enctype) "uuencode" is no longer supported. These are all deprecated by IEEE Std. 1735-2014. For further assistance, please contact a Siemens representative. QSIM-78838 - Vopt would sometimes generate this internal error on index expressions: ** Error: test.sv(7): Questa has encountered an unexpected internal error: ../../src/vlog/vgenindex.c(1205). Please contact Questa support at https://support.sw.siemens.com/ _______________________________________________________________________ Release Announcements in 2022.4 * Due to enhanced security restrictions with web browser PDF plug-ins, some links do not function. Links in HTML documentation are fully functional. Clicking a link within a PDF viewed in a web browser may result in no action, or it may load the title page of the current PDF manual (instead of the intended target in the PDF manual). The unresolved link behavior occurs in all web browsers on Windows and Linux platforms. Because of this behavior, the navigational experience of PDF manuals is compromised. PDF is ideal for printing because of its page-oriented layout. Use the HTML manuals to search for topics, navigate between topics, and click links to examples, videos, reference material, and other related technical content. For information about Adobe's discontinued support of Adobe Reader on Linux platforms and your available options, refer to Knowledge Article MG596568 on SupportNet. Linux is a registered trademark of Linus Torvalds in the U.S. and other countries. * Notice of Accessibility For ModelSim, Questa SIM, and Visualizer Debug Environment products, U.S. English is the only language supported. * QSIM-75179 - voptclassic is deprecated from 2022.1 and subsequent releases. If voptclassic is used either directly or by setting environment variable QUESTA_CLASSIC_VOPT, it will produce an error, displaying a deprecation message, which can be suppressed or downgraded to a warning or a note. If suppressed, it will still produce a warning message displaying a deprecation message. Users can continue using voptclassic in 2022.1 either by suppressing or downgrading the error message. However, voptclassic is not recommended and vopt should be used instead. _______________________________________________________________________ Base Product Specifications in 2022.4 * [Supported Platforms] Linux RHEL 7 x86/x86-64 Linux RHEL 8 x86/x86-64 Linux SLES 12 x86/x86-64 Linux SLES 15 x86/x86-64 Windows 10 x86/x64 [Supported GCC Compilers (for SystemC)] gcc-7.4.0-linux/gcc-7.4.0-linux_x86_64 gcc-5.3.0-linux/gcc-5.3.0-linux_x86_64 gcc-4.7.4-linux/gcc-4.7.4-linux_x86_64 gcc-7.4.0-mingw32vc15 gcc-7.4.0-mingw64vc15 [OVL (shipped with product)] v2.8.1 [Licensing] FLEXnet v11.16.4.0 SALT v1.4.3.0 _______________________________________________________________________ Compatibility Issues with Release 2022.4 Key Information Compatibility * QSIM-74070 - (source) Starting 2022.1 release, OSVVM and UVVM libraries are no longer shipped in Questa installation. Users needing these libraries can directly download them to compile and use with QuestaSim * [nodvtid] - (source) For protected HDL source (Verilog and VHDL), legacy ciphers (data_method) "3des-cbc", "des-cbc", "blowfish-cbc", and "cast128-cbc" are no longer supported for either encryption (in vhencrypt/vencrypt) or for decryption (in vcom/vlog). Further, encoding method (enctype) "uuencode" is no longer supported. These are all deprecated by IEEE Std. 1735-2014. For further assistance, please contact a Siemens representative. * [nodvtid] - (source, results) Starting from 2023.1 release: 1. For linux and linux_x86_64: 1. GCC 5.3.0 and GCC 4.7.4 will no longer be supported and they will no longer be distributed with the release. * For linux_aarch64: 1. GCC 5.4.0 will no longer be supported and it will no longer be distributed with the release. SystemVerilog Compatibility * QSIM-79531 - (results) In some rare cases, randomize() would incorrectly evaluate scenarios having constraints involving real-type multiplication. This bug would effectively cause randomize() to miss generating some valid solutions. This issue has been fixed. * QSIM-78119 - (results) In some rare cases, randomize() would generate the same solution for multiple array elements of random unpacked arrays. This issue has been fixed. * QSIM-78840 - (results) In some rare cases, randomize() would incorrectly evaluate an if/else constraint having a random condition expression containing a division or modulo expression where the divisor could be zero. This issue has been fixed. * QSIM-78574 - (results) In some rare cases, a randomize() call that fails (i.e. has a return value of 0) will incorrectly modify the value of one or more random variables. This issue has been fixed. * QSIM-78567 - (results) In some rare cases, randomize() would incorrectly evaluate a satisfiable equality constraint as unsatisfiable, causing a spurious randomize failure. This issue has been fixed. * QSIM-79148 - (results) Aliased $stack to $stacktrace for ease of VCS compatiblity * QSIM-78955 - (results) Significant improvements have been made to the -solvefaildebug constraint contradiction report generated when randomize() fails due to unsatisfiable constraint(s). The report now filters out more of the unrelated random variables and constraints (reducing noise), and the "Where" section of the output has been reorganized in a hierarchical fashion (significantly improving readability). VHDL Compatibility * QSIM-75569 - (source, results) for JIRA 75569 Process(ALL) - A VHDL 2008 language construct supported under -2008 switch , will be supported under -permissive flag as well - Questa will however issue a warning like : "** Warning: src/test1.vhd(47): (vcom-1441) Process(ALL) is not defined for this version of the language." _______________________________________________________________________ SystemVerilog Defects Repaired in 2022.4 * QSIM-78794 - Vopt would sometimes generate this error when using localparams in a parameterized class: ** Error: test.sv(16): Questa has encountered an unexpected internal error: ../../src/vlog/vgentd.c(6724). Please contact Questa support at http://supportnet.mentor.com/ * QSIM-79531 - (results) In some rare cases, randomize() would incorrectly evaluate scenarios having constraints involving real-type multiplication. This bug would effectively cause randomize() to miss generating some valid solutions. This issue has been fixed. * QSIM-78119 - (results) In some rare cases, randomize() would generate the same solution for multiple array elements of random unpacked arrays. This issue has been fixed. * QSIM-78840 - (results) In some rare cases, randomize() would incorrectly evaluate an if/else constraint having a random condition expression containing a division or modulo expression where the divisor could be zero. This issue has been fixed. * QSIM-78574 - (results) In some rare cases, a randomize() call that fails (i.e. has a return value of 0) will incorrectly modify the value of one or more random variables. This issue has been fixed. * QSIM-78567 - (results) In some rare cases, randomize() would incorrectly evaluate a satisfiable equality constraint as unsatisfiable, causing a spurious randomize failure. This issue has been fixed. _______________________________________________________________________ VHDL Defects Repaired in 2022.4 * QSIM-74586 - For some specific cases of case expressions where generic is used, we use to give incorrect error vopt-1014 error. This has been fixed. * QSIM-77337 - When a package is instantiated as a generic package in the generic clause of an entity and the formal instance name of that package is used in the port clause of the same entity to access a user-defined vector type then a fatal error is obtained. This has been fixed now. * QSIM-75963 - When reporting values inside procedures in certain situation, the values reported were incorrect. This has been fixed. * QSIM-78076 - In certain situations while doing concat operations, VOPT used to give internal error. This has been fixed. * QSIM-77949 - In certain situations, tick_last_value was not properly getting updated for some VHDL signals in mixed language boundary. This has been fixed. * QSIM-77008 - In certain situations tick_high attribute when used on time values was giving vopt error. This has been fixed. * QSIM-79144 - VHDL 2008 generic packages that contain deferred constant of an array or a record type could generate incorrect results. * QSIM-79470 - When using 2008 VHDL if-elsif-else generate, null range errors could be reported on branches that may not be used during elaboration. Checks now correct determine if a branch may or maynot be used. If the branch will not be used no warning or error is issued. If a branch may be used a warning is issued. If a branch will be used and error is reported. * QSIM-78602 - LAST_EVENT attribute was not functioning correctly in certain situation inside VHDL clocked process. This has been fixed. _______________________________________________________________________ SystemC Defects Repaired in 2022.4 * QSIM-65914 - Allow unconnected bits on SC-SV boundaries by: + Change error vsim-3685 to be suppressible. When doing so the unconnected bits will take on their default value. + If the user passed "-svext=dmsbw" to vopt, the error will be downgraded to a warning and the extra bits will be forced to Zero values. _______________________________________________________________________ Mixed Language Defects Repaired in 2022.4 * QSIM-31681 - -mixedsvvh supports SV arrays with index of constant range expression type only. Other index types such as dynamic range expressions (eg. 'string') are not supported. The IDL error thrown in such unsupported cases is now fixed. _______________________________________________________________________ SystemVerilog Enhancements in 2022.4 * QSIM-79148 - (results) Aliased $stack to $stacktrace for ease of VCS compatiblity * QSIM-78955 - (results) Significant improvements have been made to the -solvefaildebug constraint contradiction report generated when randomize() fails due to unsatisfiable constraint(s). The report now filters out more of the unrelated random variables and constraints (reducing noise), and the "Where" section of the output has been reorganized in a hierarchical fashion (significantly improving readability). _______________________________________________________________________ VHDL Enhancements in 2022.4 * QSIM-75569 - (source, results) for JIRA 75569 Process(ALL) - A VHDL 2008 language construct supported under -2008 switch , will be supported under -permissive flag as well - Questa will however issue a warning like : "** Warning: src/test1.vhd(47): (vcom-1441) Process(ALL) is not defined for this version of the language." _______________________________________________________________________ Document Revision History in 2022.4 * Revision - Changes - Status/Date 7.9 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/October 2022 7.8 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/September 2022 7.7 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/August 2022 * Author: In-house procedures and working practices require multiple authors for documents. All associated authors for each topic within this document are tracked within the document source. * Revision History: Released documents maintain a revision history of up to four revisions. For earlier revision history, refer to earlier releases of documentation which are available on Support Center (http://support.mentor.com).