Release Notes For Questa Sim - Intel FPGA Edition 2023.4 Oct 09 2023 Copyright 1991-2023 Mentor Graphics Corporation All rights reserved. This document contains information that is proprietary to Mentor Graphics Corporation. The original recipient of this document may duplicate this document in whole or in part for internal business purposes only, provided that this entire notice appears in all copies. In duplicating any part of this document the recipient agrees to make every reasonable effort to prevent the unauthorized use and distribution of the proprietary information. TRADEMARKS: The trademarks, logos and service marks ("Marks") used herein are the property of Mentor Graphics Corporation or other third parties. No one is permitted to use these Marks without the prior written consent of Mentor Graphics or the respective third-party owner. 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End-User License Agreement: You can print a copy of the End-User License Agreement from: www.mentor.com/terms_conditions/enduser.cfm. _______________________________________________________________________ * How to Get Support For information on how to obtain technical support, visit the support page at [1]http://supportnet.mentor.com _______________________________________________________________________ Index to Release Notes * [2]Key Information * [3]Release Announcements in 2023.4 * [4]Base Product Specifications in 2023.4 * [5]Compatibility Issues with Release 2023.4 * [6]General Defects Repaired in 2023.4 * [7]SystemVerilog Defects Repaired in 2023.4 * [8]VHDL Defects Repaired in 2023.4 * [9]Mixed Language Defects Repaired in 2023.4 * [10]Power Aware Defects Repaired in 2023.4 * [11]SystemVerilog Enhancements in 2023.4 * [12]Power Aware Enhancements in 2023.4 * [13]Document Revision History in 2023.4 _______________________________________________________________________ Key Information * QSIM-81233 - This release will update licensing to SALT v1.6.3.0. There is no change between 2023.2 and 2023.3 with regards to the FLEXnet version used, it continues to be FLEXnet v11.16.4.0. + For floating licenses, it will be necessary to verify that the vendor daemon (i.e., mgcld) and the license server (i.e., lmgrd) have FLEXnet versions equal to or greater than 11.16.4.0. If the current FLEXnet version of your vendor daemon and lmgrd are less than 11.16.4.0 then it will be necessary to stop your license server and restart it using the vendor daemon and lmgrd contained in this release. + For node locked licenses, nothing needs to be done. In summary, this release uses the following license versions: + FLEXnet v11.16.4.0 + SALT v1.6.3.0 * QSIM-74070 - (source) Starting 2022.1 release, OSVVM and UVVM libraries are no longer shipped in Questa installation. Users needing these libraries can directly download them to compile and use with QuestaSim * The vhdl2008 technote located at docs/technotes/vhdl2008.note has been removed. * QSIM-78850 - + GNU GCC has a known change in behavior starting GCC-9 which causes performance degradation compared to previous versions during the compilation of code that heavily uses inline functions. + This is observable as well on the last version that we currently support (GCC-10.3.0). + The performance degradation is reported in [14]https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89584 + This affects the compilation time of code that heavily makes use of large inline functions. * This is due to the default value of "max-inline-insns-single" changing from 400 to 70. This value dictates the maximum number of instructions for a single inline function. SystemC/DPI/FLI/PLI/VPI code that heavily makes use of large inline functions might face performance degradation during the compilation when GCC-10.3.0 is used. To overcome this change, user can pass "--param max-inline-insns-single=400" to the GCC command or sccom command. (source) For protected HDL source (Verilog and VHDL), legacy ciphers (data_method) "3des-cbc", "des-cbc", "blowfish-cbc", and "cast128-cbc" are no longer supported for either encryption (in vhencrypt/vencrypt) or for decryption (in vcom/vlog). Further, encoding method (enctype) "uuencode" is no longer supported. These are all deprecated by IEEE Std. 1735-2014. For further assistance, please contact a Siemens representative. (source, results) Starting from 2023.1 release: 1. For linux and linux_x86_64: 1. GCC 5.3.0 and GCC 4.7.4 will no longer be supported and they will no longer be distributed with the release. For linux_aarch64: 1. GCC 5.4.0 will no longer be supported and it will no longer be distributed with the release. QSIM-75015 - (source, results) GCC changes starting 2023.1: 1. GCC 10.3.0 is now available for linux, linux_x86_64 and linux_aarch64 platforms as the SystemC/DPI/FLI/PLI/VPI default compiler 2. GCC 7.4.0 is still available for all platforms and is the SystemC/DPI/FLI/PLI/VPI default compiler for win32, win64 platforms. 3. For linux and linux_x86_64: + GCC 5.3.0 and GCC 4.7.4 have been dropped and will no longer be supported or distributed with the release 4. For linux_aarch64: + GCC 5.4.0 has been dropped and will no longer be supported or distributed with the release GDB changes starting 2023.1: 1. GDB 10.2.0 is now the only GDB version being shipped for all platforms and is what's used for the CDebug feature QSIM-81993 - Starting 2023.3 Windows 11 support is assumed (smoke tested). QSIM-83336 - Questa PA will produce a suppressible error, if a non-instantiated module is used in -module with upf commands set_design_attributes and set_simstate_behavior. QSIM-78281 - Added the support for handling readers-writers intersection for VHDL QSIM-83912 - Now, while using pa_msg, usage message won't be printed until there is an error. QSIM-83985 - In some scenarios when port get redefined in RTL, tool was resulting in a crash in 0in flow. This has been fixed now. QSIM-84054 - Improved handling of named port mapping to accommodate automatic .* mapping and duplicate port names in PA flow when vopt-2247 is suppressed. QSIM-84225 - In case of insertion of any PA cells in their self-location, the output of the PA cell will be used in specify checks only when the "+notimingchecks" or "+nospecify" vopt options are enabled. In all other cases, the input of the PA cell will be used. QSIM-82606 - Questa xprop Pass mode does not corrupt arrays or propagate Xs when writing to an array whose index goes X. The pass mode used to only reports the xprop assertion message. Now, we have added support for resolving and propagating X's in pass mode when: 1. writing into an array with an X on the index. (enable under option -xprop_enable=arraycorruptwriter) 2. reading from an array with an X on the index. (enable under option -xprop_enable=arraycorruptreader) 1 & 2 are independently configurable on or off _______________________________________________________________________ Release Announcements in 2023.4 * Due to enhanced security restrictions with web browser PDF plug-ins, some links do not function. Links in HTML documentation are fully functional. Clicking a link within a PDF viewed in a web browser may result in no action, or it may load the title page of the current PDF manual (instead of the intended target in the PDF manual). The unresolved link behavior occurs in all web browsers on Windows and Linux platforms. Because of this behavior, the navigational experience of PDF manuals is compromised. PDF is ideal for printing because of its page-oriented layout. Use the HTML manuals to search for topics, navigate between topics, and click links to examples, videos, reference material, and other related technical content. For information about Adobe's discontinued support of Adobe Reader on Linux platforms and your available options, refer to Knowledge Article MG596568 on SupportNet. Linux is a registered trademark of Linus Torvalds in the U.S. and other countries. * Notice of Accessibility For ModelSim, Questa SIM, and Visualizer Debug Environment products, U.S. English is the only language supported. * QSIM-75179 - voptclassic is deprecated from 2022.1 and subsequent releases. If voptclassic is used either directly or by setting environment variable QUESTA_CLASSIC_VOPT, it will produce an error, displaying a deprecation message, which can be suppressed or downgraded to a warning or a note. If suppressed, it will still produce a warning message displaying a deprecation message. Users can continue using voptclassic in 2022.1 either by suppressing or downgrading the error message. However, voptclassic is not recommended and vopt should be used instead. * QSIM-81283 - voptclassic is deprecated from 2023.1 and subsequent releases. If voptclassic is used either directly or by setting environment variable QUESTA_CLASSIC_VOPT, it will produce an un-suppressible error, displaying a deprecation message. User should use vopt instead. * The Memory Profiler is available in vsim starting with version 2023.1. See User Manual for details. * Starting 2023.3, the Questa SIM Linux installer includes an optional component Questa Portable Stimulus Standard (Questa PSS). (Please contact a Siemens representative for more information) _______________________________________________________________________ Base Product Specifications in 2023.4 * [Supported Platforms] Linux RHEL 7 x86/x86-64 Linux RHEL 8 x86/x86-64 Linux SLES 12 x86/x86-64 Linux SLES 15 x86/x86-64 Linux ROCKY 8 x86/x86-64 Windows 10 x86/x64 [Supported GCC Compilers (for SystemC)] gcc-7.4.0-linux/gcc-7.4.0-linux_x86_64 gcc-10.3.0-linux/gcc-10.3.0-linux_x86_64 gcc-7.4.0-mingw32vc16 gcc-7.4.0-mingw64vc16 [OVL (shipped with product)] v2.8.1 [Licensing] FLEXnet v11.16.4.0 SALT v1.6.3.0 _______________________________________________________________________ Compatibility Issues with Release 2023.4 Key Information Compatibility * QSIM-74070 - (source) Starting 2022.1 release, OSVVM and UVVM libraries are no longer shipped in Questa installation. Users needing these libraries can directly download them to compile and use with QuestaSim * [nodvtid] - (source) For protected HDL source (Verilog and VHDL), legacy ciphers (data_method) "3des-cbc", "des-cbc", "blowfish-cbc", and "cast128-cbc" are no longer supported for either encryption (in vhencrypt/vencrypt) or for decryption (in vcom/vlog). Further, encoding method (enctype) "uuencode" is no longer supported. These are all deprecated by IEEE Std. 1735-2014. For further assistance, please contact a Siemens representative. * [nodvtid] - (source, results) Starting from 2023.1 release: 1. For linux and linux_x86_64: 1. GCC 5.3.0 and GCC 4.7.4 will no longer be supported and they will no longer be distributed with the release. * For linux_aarch64: 1. GCC 5.4.0 will no longer be supported and it will no longer be distributed with the release. QSIM-75015 - (source, results) GCC changes starting 2023.1: 1. GCC 10.3.0 is now available for linux, linux_x86_64 and linux_aarch64 platforms as the SystemC/DPI/FLI/PLI/VPI default compiler 2. GCC 7.4.0 is still available for all platforms and is the SystemC/DPI/FLI/PLI/VPI default compiler for win32, win64 platforms. 3. For linux and linux_x86_64: + GCC 5.3.0 and GCC 4.7.4 have been dropped and will no longer be supported or distributed with the release 4. For linux_aarch64: + GCC 5.4.0 has been dropped and will no longer be supported or distributed with the release GDB changes starting 2023.1: 1. GDB 10.2.0 is now the only GDB version being shipped for all platforms and is what's used for the CDebug feature SystemVerilog Compatibility * [nodvtid] - (source, results) Error messaging for some deprecated and/or unimplemented acc/tf PLI routines has changed. The error messages are still suppressible and after suppression routines that were working will continue to work. However note that the longer term trajectory for these routines is full deprecation. * QSIM-73007 - (results) In some rare cases, a randomize() call via super.randomize() or class_name::randomize() would register the constraint(s) of a derived class instead of the specified class, resulting in incorrect randomize() behavior. This issue has been fixed. * QSIM-83008 - (results) In some rare cases, randomize() would generate a solution that contradicts one or more !inside constraints. This issue has been fixed. * QSIM-82862 - (results) In some rare cases involving multiple 'dist' constraints on a common LHS, randomize() would generate a solution that contradicts one or more of the specified 'dist' constraints.This issue has been fixed. * QSIM-83015 - (results) In some rare cases, randomize() would generate an invalid solution for a scenario involving an iterative constraint on a non-random dynamic array or queue. This issue has been fixed. * QSIM-83738 - (results) Two identical randomize() calls (having the same random variables and constraints) involving one or more 'soft' constraints, with the same starting randstate, would sometimes generate different solutions (even when -svrandext=strictstab is enabled). This issue has been fixed. * QSIM-82643 - (results) In some cases, a randomize() call involving a random dynamic array/queue and a "unique" constraint on the same array/queue would spuriously fail due to a constraint contradiction if the solver evaluates the size of the dynamic array/queue to a value that causes the "unique" constraint to become unsatisfiable. This issue has been fixed. * QSIM-82437 - (results) In some rare cases, randomize() would produce different results between a checkpointed simulation and a non-checkpointed simulation -- even when the -svrandext=+strictstab extension is enabled. This issue has been fixed. VHDL Compatibility * QSIM-82837 - (results) Long compile and vopt times could occur if to many statements occurred on the same line of the file or if the large number of statememts were encrypted. Note that default label generation has changed slightly to be more consistent. All default labels on the same line will be unique. The scope the label was created in is no longer important. Power Aware Compatibility * QSIM-81421 - (source, results) Added Complete support for Retention according to UPF 4 LRM. User can enable these new retention semantics with vopt option "-pa_enable=newretsemantics". The highlights are - 1. "async_set_reset_effect" option to determine how the model should honor the asynchronous signals 2. "restore_period_effect" option to handle the behavior during the restore period. 3. Level sensitive restore to now happen throughout the period when the control signal is high and not just at the trailing edge * QSIM-85180 - (results) Source nets of resolved supply nets, which are themselves resolved, will no longer be included in the driving resolved bus. General Compatibility * QSIM-81937 - (source) fixed the issue of vopt crash while adding a covergroup to a checker. * QSIM-79644 - (source, results) Changed PDI FSDB dumping so that modports and wreals are NOT logged by default. This make the default PDI FSDB logging compatible with Novas -pli based logging. Now in order to log wreals with PDI FSDB logging, use the +fsdb+wreal[=on|off] vsim command line switch or the +wreal option for the fsdbDumpvars or fsdbDumpMDA commands. Now in order to log modports with PDI FSDB logging, use the +fsdb+modport[=on|off] vsim command line switch or the +modport option for the fsdbDumpvars or fsdbDumpMDA commands. Note these are all non-standard options that are NOT supported by Novas. _______________________________________________________________________ General Defects Repaired in 2023.4 * QSIM-79644 - (source, results) Changed PDI FSDB dumping so that modports and wreals are NOT logged by default. This make the default PDI FSDB logging compatible with Novas -pli based logging. Now in order to log wreals with PDI FSDB logging, use the +fsdb+wreal[=on|off] vsim command line switch or the +wreal option for the fsdbDumpvars or fsdbDumpMDA commands. Now in order to log modports with PDI FSDB logging, use the +fsdb+modport[=on|off] vsim command line switch or the +modport option for the fsdbDumpvars or fsdbDumpMDA commands. Note these are all non-standard options that are NOT supported by Novas. * QSIM-81937 - (source) fixed the issue of vopt crash while adding a covergroup to a checker. _______________________________________________________________________ SystemVerilog Defects Repaired in 2023.4 * QSIM-83149 - Vsim would sometimes incorrectly report errors like: ** Error: (vsim-7065) Illegal assignment to class C #(T1) from class C#(T2) In code that used chained function calls like "f().d[1]" * QSIM-83088 - Vsim would sometimes crash during elaboration when using a class data member for a replication count in a concatenation expression. This would normally only happen in tests compiled with -suppress 8303 * [nodvtid] - Vsim would sometimes create multiple, incompatible virtual interface types after moving, deleting or renaming the original work library. * QSIM-82637 - vsim would sometimes crash during elaboration due to specialized classes with virtual interface fields. * QSIM-73007 - (results) In some rare cases, a randomize() call via super.randomize() or class_name::randomize() would register the constraint(s) of a derived class instead of the specified class, resulting in incorrect randomize() behavior. This issue has been fixed. * QSIM-83008 - (results) In some rare cases, randomize() would generate a solution that contradicts one or more !inside constraints. This issue has been fixed. * QSIM-82862 - (results) In some rare cases involving multiple 'dist' constraints on a common LHS, randomize() would generate a solution that contradicts one or more of the specified 'dist' constraints.This issue has been fixed. * QSIM-73006 - Previous versions of Questa did not support a call to randomize() via class_name::randomize() with arguments. This issue has been fixed (arguments are now supported for these types of randomize() calls). * QSIM-83015 - (results) In some rare cases, randomize() would generate an invalid solution for a scenario involving an iterative constraint on a non-random dynamic array or queue. This issue has been fixed. * QSIM-83738 - (results) Two identical randomize() calls (having the same random variables and constraints) involving one or more 'soft' constraints, with the same starting randstate, would sometimes generate different solutions (even when -svrandext=strictstab is enabled). This issue has been fixed. * QSIM-82643 - (results) In some cases, a randomize() call involving a random dynamic array/queue and a "unique" constraint on the same array/queue would spuriously fail due to a constraint contradiction if the solver evaluates the size of the dynamic array/queue to a value that causes the "unique" constraint to become unsatisfiable. This issue has been fixed. * QSIM-84661 - In some cases, randomize() would report a spurious (vsim-7067) error (Index out of bounds) for a constraint involving a multi-dimensional random dynamic array. This issue has been fixed. * QSIM-84883 - Significantly improved the performance (>10x) for randomize() calls involving large numbers of 'soft' constraints and 'disable soft' constraints. * QSIM-84864 - In some rare cases, randomize() would trigger an internal error (slvComputation.c). This issue has been fixed. * [nodvtid] - In some rare cases, randomize() would generate an invalid solution (a solution that contradicts one or more constraints) related to in-line constraints referring to class handle(s) in the local scope. This issue has been fixed. * QSIM-84642 - Calling std::randomize() with a hierarchical reference to a SystemC variable would not update the value of the variable with the solution generated during the randomize() call. This issue has been fixed. * QSIM-84618 - In some rare cases, randomize() would trigger an internal error (slvSolverContext.c) when evaluating in-line constraints referring to class handle(s) in the local scope. This issue has been fixed. * QSIM-82437 - (results) In some rare cases, randomize() would produce different results between a checkpointed simulation and a non-checkpointed simulation -- even when the -svrandext=+strictstab extension is enabled. This issue has been fixed. * QSIM-84223 - In some rare cases, randomize() would spuriously fail (no solutions / constraint contradiction) for scenarios involving random dynamic arrays that are resized during randomize(). This issue has been fixed. * QSIM-84218 - In some rare cases, randomize() would perform slowly and/or timeout for a scenario that performed well in Questa versions 2022.1 and earlier. This issue has been fixed. * QSIM-85114 - Significantly improved the performance of randomize() calls involving large numbers (thousands) of 'soft' constraints for a wide variety of scenarios. * QSIM-85925 - In some rare cases, randomize() would spuriously fail (no solutions / constraint contradiction) when evaluating a 'unique' constraint with constant 4-state operands. This issue has been fixed. _______________________________________________________________________ VHDL Defects Repaired in 2023.4 * QSIM-82053 - When a generic is of null array type and is mapped to an empty string literal in certain situations, a vsim crash is obtained. This has been fixed. * QSIM-82072 - Tick_HIGH attribute when used on empty string, used to give error in simulation. This has been fixed. * QSIM-81354 - Tick_Subtype attribute when used on more than one dimension, used to give error or wrong_value in simulation in some versions of Questa. This has been fixed. * QSIM-81777 - Different copy of subtype was picked if there was an instance of procedure in package. This has been fixed. * QSIM-83925 - In a concurrent signal assignment where the right hand side is an aggregate, simulation results could be incorrect if the direction or bounds of the aggregate do not match the direction and bounds of the left hand side target expression. * QSIM-82040 - Protected type array variable whose index expression depends on non protected type constant record member, used to get created with incorrect size. This has been fixed. * QSIM-82247 - For some specific cases where functions and procedures have the same function arguments, vcom used to throw an error. This has been fixed. * QSIM-84383 - If a during optimize, we compute a variable of type std.textio.line and then index or slice that variable, incorrect data will be generated. This can result in incorrect constants being generated at elaboration time. More often than not will will be a some number of NULL characters followed by random characters. If a string containing NULL characters is send to the transcript, like the in a report statement. The string will be pre-maturely terminated at the first NULL. The fix is to generate the correct value for the slice and index in such cases. * QSIM-82837 - (results) Long compile and vopt times could occur if to many statements occurred on the same line of the file or if the large number of statememts were encrypted. Note that default label generation has changed slightly to be more consistent. All default labels on the same line will be unique. The scope the label was created in is no longer important. * QSIM-84450 - A variable assigned to from within a loop could be ignored if the assign is done using an aggregate as the target. * QSIM-84301 - Variable assignments within loops could be ignored if the variable is assign to through an aggregate. * [nodvtid] - When FSM detection is enable the tool would crash if a process had subprogram calls to a subprogram instance. The fix is to not allow processes with subprogram instance calls to be a FSM. * [nodvtid] - In some cases when assigning to a slice of a signal that is a NULL array, an error would be reported incorrectly. The message would say the whole signal, not the slice, is not the same length as the NULL array being assigned to it. * QSIM-85055 - Vcom would crash when autoorder is being used if an entity that doesn't currently exist in a library is reference in a configuration specification and the entity has been made directly visible by a use statement. Example: library lib1; use lib1.entity1; architecture rtl of some_entity is component c is end component; for all:c use entity entity1; * QSIM-85121 - Aliases to external names in subprograms may have incorrect signal attributes like last_value. * QSIM-85149 - If a hierarchical reference is used in a port connection and the reference is to a signal that is an alias of an alias or an alias to a port that has been collapsed due to optimization. The reference would fail to find the object and report an error. * QSIM-85747 - Using 'element on a array type with more than one dimension would result in an incorrect result. * QSIM-85768 - When using auto order. If an entity name reference in a direct instantiation matches the name of another identifier, an incorrect error will be reported. This can occur at the direct instantiation or some other location where the matching identifier is used. * [nodvtid] - If a design unit contains a large number of expression that consist of real literals and implicit operations like -3.0 or 3.0/1.0, vcom performance would be very slow. This slow down has been resolved. * QSIM-85958 - The -g/-G options when specifying more that just the generic name does not propagate to changes in port width in all cases. _______________________________________________________________________ Mixed Language Defects Repaired in 2023.4 * QSIM-84122 - When Verilog configurations are used on a VHDL design unit. It can cause a default binding to report an error about missing generics or ports on the entity selected. This error was incorrect and misleading because the generics or ports of the component and default entity were legal. This problem has been fixed and the error message about default binding failure has been enhance to include the actual entity selected and the reason why. _______________________________________________________________________ Power Aware Defects Repaired in 2023.4 * QSIM-82734 - Added verror for vopt warning "vopt-9555". * QSIM-81341 - Added support for writing out Power State Analysis Report into CSV File, that shows all the Power State Tables fully expanded and hierarchically composed under the vopt option -pa_genrpt=csv_pst * QSIM-81421 - (source, results) Added Complete support for Retention according to UPF 4 LRM. User can enable these new retention semantics with vopt option "-pa_enable=newretsemantics". The highlights are - 1. "async_set_reset_effect" option to determine how the model should honor the asynchronous signals 2. "restore_period_effect" option to handle the behavior during the restore period. 3. Level sensitive restore to now happen throughout the period when the control signal is high and not just at the trailing edge * QSIM-84633 - In vsim, user can identify if its a low-power simulation using tcl proc "GetPAMode" Below example demonstrates how user can use "GetPAMode" in .do file in vism: if {[GetPAMode]} { echo "This is A PA simulation" } * QSIM-85484 - Questa PA will produce a suppressible error, if a power domain is specified in -elements list of UPF command set_design_attributes for an attribute for which power domain is not supported. Error will be reported as: ** Error (suppressible): top.upf(62): UPF: (vopt-9579) Power Domain 'top_domain' in -elements list of set_design_attributes command is currently not supported. * QSIM-85485 - In case of potential conflict between UPF Power Switch ack port driver and RTL, tool will detect the conflict and resolve it during simulation. The resolution is if RTL driver is present after resolution, it will be given preference otherwise UPF ack port driver will be used. This is supported under vopt option -pa_enable=[+]ackportdriver. Under this option, in case of potential conflict, a warning (vopt-9578) will be generated: ** Warning: top.sv(49): (vopt-9578) Ack port ack_p(/tb/instop/multi) has a potential conflict with RTL driver. Conflict will be resolved during simulation. By default, this option is disabled. * QSIM-85180 - (results) Source nets of resolved supply nets, which are themselves resolved, will no longer be included in the driving resolved bus. * QSIM-85115 - Support added for skipping generate block scopes during relative path traversal with the set_scope UPF command. Attempting to access generate block scopes using set_scope command will now result in a vopt-9647 error. These changes will be enabled under the vopt option -pa_upfextensions=genscope * QSIM-85763 - Behavior of tcl/upf puts command with -nonewline option is now fixed. * QSIM-85545 - vopt-9022 (output port has no drivers) warning will not be reported for output ports driven via resolved bus. _______________________________________________________________________ SystemVerilog Enhancements in 2023.4 * [nodvtid] - (source, results) Error messaging for some deprecated and/or unimplemented acc/tf PLI routines has changed. The error messages are still suppressible and after suppression routines that were working will continue to work. However note that the longer term trajectory for these routines is full deprecation. * QSIM-82940 - Non-LRM compliant 'soft' implication constraints are now supported via the compile-time (vlog/vopt) SystemVerilog extension 'softimp'. When "vlog -svext=softimp" is enabled: + any occurrence of a 'soft' implication constraint will be interpreted as described by the Description section (below) + 'soft' implication constraints involving unsupported constructs will cause an informative error message to be reported When "vlog -svext=softimp" is disabled: + any occurrence of a 'soft' implication constraint will cause an informative error message to be reported This extension will be DISABLED by default. Specifying "vlog -pedanticerrors" will also disable the "softimp" extension (even if enabled via -svext=+softimp). Description A 'soft' implication constraint is a non-LRM compliant construct that can be declared as follows: soft if (cond) { a; b; c; } Note that implication constraints can be written using implication style syntax: soft (cond) -> { a; b; c; } The 'soft' implication constraints (above) will be interpreted as follows: soft (cond) -> (a && b && c); The SystemVerilog extension will support the following types of implied constraints: + expressions + 'dist' + 'unique' + nested implied constraints The following kinds of constructs will not be supported by 'soft' implication constraints: + implied solve/before constraint + implied 'disable soft' constraint + implied iterative constraint + implied 'soft' constraint ('soft' will be ignored, will generate warning) + implication constraint with 'else' clause * QSIM-69839 - Enhanced support for randomize() scenarios involving random dynamic arrays with complex dependencies between the size of the array and the element(s) of the array has been implemented, such that the constraints involving the elements of the dynamic array can be simultaneously evaluated with the size of the dynamic array for the following constructs: + iterative constraints on the dynamic array + array reduction methods on the dynamic array This enhanced support is NOT enabled by default, but can be enabled via the vsim command line option "-svrandext=+dynext". NOTE: When -svrandext=dynext is enabled, the -svrandext=prerandfirst extension will also automatically be enabled. It is not legal to enable -svrandext=dynext and disable -svrandext=prerandfirst. Limitations: + the enhanced flow supports dynamic arrays with a maximum size <= 64 + the enhanced flow does not support multi-dimensional dynamic arrays _______________________________________________________________________ Power Aware Enhancements in 2023.4 * QSIM-82524 - Added support for generating Power State Table Analysis Report into CSV File (report.pst.csv), with no hierarchically expanded objects/columns. This will be enabled under the vopt option -pa_genrpt=csv_pst_opt * QSIM-82649 - Added support for reduction function (in VHDL) & unary reduction operators (in VHDL 2008) for CDFG & DFA Cone Analysis for flip-flop/latch (sequential block) detection. _______________________________________________________________________ Document Revision History in 2023.4 * Author: In-house procedures and working practices require multiple authors for documents. All associated authors for each topic within this document are tracked within the document source. * Revision History: Released documents maintain a revision history of up to four revisions. For earlier revision history, refer to earlier releases of documentation which are available on Support Center (http://support.mentor.com). * 8.9 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/October 2023 8.8 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/September 2023 8.7 - Modifications to improve the readability and comprehension of the content. Approved by Tim Peeke. All technical enhancements, changes, and fixes are listed in this document for all products in this release. Approved by Bryan Ramirez. - Released/August 2023